The present invention relates to a semiconductor device to be interposed between a CPU and a memory, and an I/O device to serve as a data transfer bridge and, more particularly, to a semiconductor device that realizes efficient data transfer between a memory and an I/O device.
Large-capacity storage mediums, such as CD-ROMs and DVD-RAMs, are used currently as mediums for distributing music numbers and video programs to general families. It is expected that the distribution of multimedia data through CATV networks and the Internet will be further generalized, and personal computers and domestic AV equipment will need to deal with a large quantity of multimedia data. An apparatus that compresses music data recorded on a CD-ROM, accumulates compressed music data on an HDD, and transfers the data to a portable device has been proposed as a part of such a market trend and a technical trend.
A CD-ROM drive, a DVD drive and an HDD can be connected to current personal computers, and music data can be compressed and accumulated, and the compressed data can be transferred to a portable device by software installed in the personal computer. However, since the quantity of music data to be transferred is large, the personal computer takes much time for data transfer. Since music data stored in a CD-ROM or a DVD, and compression process unit are different from each other, and data unit after compression and the format of an HDD are different from each other, data format must be converted to transfer data between those devices differing from each other in format. Therefore, an apparatus capable of efficiently achieving data transfer has been desired.
Accordingly, it is an object of the present invention to provide a semiconductor device disposed between a CPU and a memory, and an I/O device and capable of efficiently transferring data between the memory and the I/O device.
According to the present invention, a semiconductor device which is connected to a CPU, a memory and a plurality of I/O devices to control data transfer between the memory and the I/O devices, includes a DMAC (direct memory access controller) channel corresponding to at least one of those I/O devices, and a bus arbiter which determines a bus master and permits the bus master data transfer in response to a request for data transfer from each of the CPU and the DMAC to the memory.
The semiconductor device according to the present invention may further include control circuits for controlling data transfer to transfer data skipping a part of an area on the memory when transferring data between the DMAC and the memory.
The semiconductor device according to the present invention may further include control circuits which control block by block data transfer so that format conversion can be achieved when data is transferred from the DMAC.